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AD5398
SPECIFICATIONS
V
DD
= 2.7 V to 5.5 V, AGND = DGND = 0 V,
load resistance R
L
= 25 Ω connected to V
DD
; all specifications T
MIN
to T
MAX
,
unless otherwise noted.
Table 1.
B Version
1
Parameter
Min
Typ
Max
DC PERFORMANCE
Rev. A | Page 3 of 16
Unit
Test Conditions/Comments
V
DD
= 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V with
reduced performance
117 μA/LSB
Guaranteed monotonic over all codes
All 0s loaded to DAC
@ 25°C
V
DD
= 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V but
specified maximum sink current might not be achieved
PD = 1
Output voltage range over which max sink current is
available
To 10% of FS, coming out of power-down mode; V
DD
= 5 V
V
DD
= 2.7 V to 5.5 V
V
DD
= 2.7 V to 5.5 V
V
IN
= 0 V to V
DD
Pulse width of spike suppressed
I
DD
specification is valid for all DAC codes.
V
IH
= V
DD
, V
IL
= GND, V
DD
= 5.5 V
V
IH
= V
DD
, V
IL
= GND, V
DD
= 4.5 V
V
IH
= V
DD
, V
IL
= GND
Resolution
Relative Accuracy
2
Differential Nonlinearity
2, 3
Zero Code Error
2, 4
Offset Error @ Code 16
2
Gain Error
2
Offset Error Drift
4, 5
Gain Error Drift
2, 5
OUTPUT CHARACTERISTICS
Minimum Sink Current
4
Maximum Sink Current
0
10
±1.5
1
0.5
10
±0.2
3
120
±4
±1
5
±0.6
±0.5
Bits
LSB
LSB
mA
mA
% of FSR
μA/oC
LSB/oC
mA
mA
Output Current During PD
Output Compliance
5
0.6
80
V
DD
nA
V
Power-Up Time
LOGIC INPUTS (PD)
5
Input Current
Input Low Voltage, V
INL
Input High Voltage, V
INH
Pin Capacitance
LOGIC INPUTS (SCL, SDA)
5
Input Low Voltage, V
INL
Input High Voltage, V
INH
Input Leakage Current I
IN
Input Hysteresis, V
HYST
Digital Input Capacitance, C
IN
Glitch Rejection
6
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
V
DD
= 2.7 V to 5.5 V
V
DD
= 2.7 V to 4.5 V
I
DD
(Power-Down Mode)
0.7 V
DD
0.3
0.7 V
DD
0.05 V
DD
2.7
20
3
6
2.5
2.3
0.5
±1
0.8
0.3 V
DD
V
DD
+ 0.3
±1
50
5.5
4
3
1
μs
μA
V
V
pF
V
V
μA
V
pF
ns
V
mA
mA
μA
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
See the Terminology section.
3
Linearity is tested using a reduced code range: Codes 32 to 1023.
4
To achieve near zero output current, use the power-down feature.
5
Guaranteed by design and characterization; not production tested.
6
Input filtering on both the SCL and SDA inputs suppresses noise spikes that are less than 50 ns.
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